1. Field of the Invention
The present invention relates to a semiconductor device using a bootstrap circuit system to drive the power devices of an inverter, etc.
2. Background Art
A semiconductor device for driving power devices will be described with reference to FIG. 7. The semiconductor device 100 shown in FIG. 7 is adapted to control a high side power device 130 and a low side power device 134 which are connected in a totem-pole configuration. The semiconductor device 100 includes a high side drive circuit 102 for controlling the high side power device 130 and a low side drive circuit 114 for controlling the low side power device 134. Further, the semiconductor device 100 also includes a monolithically formed bootstrap diode 118.
The semiconductor device 100 is a high voltage IC and incorporates a “BSDi system” using the bootstrap diode 118. The bootstrap diode 118 is connected at its anode to a VCC terminal 138 and at its cathode to a VB terminal 140 for supplying a high-side floating supply absolute voltage VB, as shown in FIG. 7. A capacitor 122 is connected between the VB terminal 140 and a VS terminal 142 for supplying a high-side floating supply offset voltage VS. The capacitor 122 is charged through the bootstrap diode 118 when the low side power device 134 is turned on. Thus, this construction eliminates the need for a high side floating power supply.
FIG. 8 is a cross-sectional view of the bootstrap diode 118. Referring to FIG. 8, a P-well 210 is spaced from a P-type diffusion layer 204 so that the high voltage diode can be used as a bootstrap diode (BSDi). However, when a power supply voltage is applied to the semiconductor device 100 (which includes the bootstrap diode 118), the anode 200 of the bootstrap diode 118 is at a higher potential than the cathode 202 of the bootstrap diode 118 by an amount equal to the power supply voltage. The resulting voltage between the anode 200 and a p-substrate 208 causes a parasitic transistor PNPTr to conduct a current from the anode to the substrate, resulting in a significant increase in the current supplied from the VCC terminal 138 (i.e., the semiconductor device 100 consumes a considerable amount of current). More specifically, referring to FIG. 7, most of the current from the VCC terminal 138 flows through the anode of the bootstrap diode 118 to the p-substrate (i.e., the GND side), instead of flowing through the bootstrap diode 118 to charge the capacitor 122, and hence goes to waste.
Thus, the above construction of the semiconductor device 100 does not allow for reduction of the energy consumption of the device, although this construction eliminates the need for a high-side floating power supply by including a bootstrap diode. In order to address this problem, a device structure has been proposed in Japanese Laid-Open Patent Publication No. 5-283718 (1993) to reduce the parasitic current flowing through the parasitic transistor PNPTr. The bootstrap diode disclosed in this publication is formed so that a larger current flows through the lateral PNP transistor than through  the vertical parasitic transistor PNPTr (the lateral PNP transistor having a higher current gain than the vertical transistor PNPTr), thereby reducing the parasitic current flowing in the vertical transistor PNPTr.
In this bootstrap diode, however, the P+-layer for reducing the parasitic current must be formed near the N+-layer of the cathode electrode. The formation of this P+-layer is accomplished, e.g., by a double diffusion method. In common CMOS processes, however, the formation of a double diffusion layer is an optional process step. This means that a process including the formation of a double diffusion layer causes a high manufacturing cost. Further, a double diffusion layer forming step complicates the entire manufacturing process and hence increases the manufacturing cost, especially when the double diffusion layer is monolithically formed in the high side drive circuit so that the layer can be used as a bootstrap diode for supplying power to the high side drive circuit.
Further, the construction of the bootstrap diode disclosed in the above patent publication can reduce the parasitic current but cannot eliminate it, failing to sufficiently reduce the energy consumption of the device.